Upstream RFC: Accelerator Capability Descriptor (ACD) & Hardware-Adaptive Serving Policies
Motivation & Problem: Current serving engines enforce hardcoded chunk sizes (e.g. 512 tokens) and symmetric parallelism across disaggregated pools (prefill_tp == decode_tp). On compute-dense GPUs like NVIDIA L40S (423 FLOPs/Byte inflection), small chunks starve execution units; on lower-inflection GPUs like RTX 3090 (76 FLOPs/Byte), static chunks waste memory. Furthermore, disaggregated clusters cannot pair compute GPUs for prefill with memory GPUs for decode because KV head sharding layouts conflict.
Proposed Specification: (1) An EngineConfig hardware interrogation interface standardizing dynamic Roofline inflection calculations (inflection_point = peak_tflops / memory_bandwidth) to auto-tune batching and chunked prefill budgets; and (2) an Asymmetric Disaggregation Protocol enabling mismatched tensor parallelism via bipartite GQA head partitions and in-flight FP8 wire quantization.